1. Field of the Invention
The present invention relates to a timing signal generating system suitable for equipment control which requires a large number of timing signals having a constant period, such as for TDMA digital automobile telephone (land mobile radio telephone) control, general sequence control, and the like.
2. Description of the Related Art
In the equipment control, a timing signal having a constant period is required in many cases. As systems for generating this timing signal, there are two types of systems including one type of system which generates the timing signal solely by hardware, and the other type which generates the timing signal by using both hardware and software. The latter is superior to the former in wide use applicability and flexibility in specification modification.
A prior art timing signal generating system having a structure of the latter type is described, for example, in "High Speed Output Unit", MCS-96 DATA SHEET (Intel Corporation, 1987, Order Number: 270532-001), pp. 5-6. FIG. 2 shows a simplified block diagram for the block diagram of the prior art system shown on page 19 of the above-mentioned document. With reference to FIG. 2, reference numeral 21 designates a timer for generating output reference time, and numeral 22 designates an associative memory of 8 words. One word of the 8 words, as shown in FIG. 3, is basically made up of an output time assigning section 31, an output terminal assigning section 32, and an operation assigning section 33. The reference numeral 23 designates a comparator for comparing an output of the timer 21 with the output time assigning section 31 in the associative memory 22.
Next, the operation of the prior art timing signal generating system as arranged as mentioned above will be explained. By way of example, it will be considered that a timing signal 41 as shown in FIG. 4 is generated from a terminal termed as a terminal A, and a timing signal 42 is generated from a terminal termed as a terminal B. In order to generate these timing signals, the time n1, n2, n3 and n4 at which changes 43, 44, 45 and 46 of the timing signals 41 and 42 are made to occur, the nature of the signal changes at that time, and names of terminals from which the changes are generated are stored in advance in the associative memory 22 as shown in FIG. 5. Each time the content of the timer 21 is incremented, an output of the timer 21 is compared with all the data of the output time assigning section 31 of the associative memory 22 by the comparator 23, and, when a coincidence is obtained in the comparison, a change assigned by the operation assigning section 33 is made to occur at a terminal assigned by the output terminal assigning section 32, and thus, the timing signals 41 and 42 are generated.
However, in the prior art timing signal generating system, after the timer 21 is incremented and before the next increment is performed, it is necessary to complete the comparison operation of the output of the timer 21 with the data of the output time assigning section 31 of the associative memory 22. For this reason, it is difficult to manufacture a system for generating a timing signal which has many changing points based on the idea mentioned above. More specifically, in the prior art example, although a timing signal having an accuracy of 2 micro seconds can be generated, since the number of words of the associative memory 22 is eight, a problem has been involved in that it is impossible to generate a timing signal having changing points exceeding eight.